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TILELOADDT1

Loads a 32-bit doubleword element from a linear address into a specified tile register.

The following table describes the supported source and destination operands.

DO NOT support LOCK

This instruction is only available when the processor is operating in 64-bit mode and requires the AMX (Advanced Matrix Extensions) feature to be enabled in the BIOS and activated via the XCR0 register.

The memory address must be aligned to the element size to avoid performance penalties; however, alignment requirements are governed by the tile configuration set by TDPALIGN. Failure to properly initialize the tile configuration using TCONFIG prior to execution will result in undefined behavior.