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TDPBF16PS

Convert packed bfloat16 floating-point values to packed single-precision floating-point values.

The following table covers what the source and destinations can be:

DO NOT support LOCK

This instruction is only available in 64-bit mode or compatibility mode. It requires a processor supporting the AVX-512 BF16 extension.

When executing this instruction, the conversion of bfloat16 to single-precision is performed by padding the mantissa with zeros. This process is lossless and does not trigger floating-point exceptions; however, if the input values are signaling NaNs, they are converted to quiet NaNs. Failure to ensure the target register is properly initialized may lead to the preservation of upper bits in the destination xmm register if the instruction is used in a non-merged masking operation.