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SUBPS

Subtracts four single-precision floating-point numbers from another set of four single-precision floating-point numbers and stores the results.

The following table covers what the source and destinations can be:

DO NOT support LOCK

This instruction requires SSE support. It is available in both 64-bit mode and compatibility mode.

The operation is performed based on the rounding mode specified in the MXCSR register. If any input operand is a signaling NaN, a #O exception MAY be generated depending on the floating-point environment.

To avoid precision loss or unexpected behavior, ensure that the memory operands are aligned on 16-byte boundaries; otherwise, a general protection fault MAY occur or performance SHALL be degraded depending on the processor implementation. All elements must be valid single-precision floating-point numbers to avoid #I.