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STMXCSR

Stores the contents of the MXCSR register into a destination memory location.

The following table covers what the source and destinations can be.

DO NOT support LOCK

This instruction is available in 64-bit mode and compatibility mode. It requires SSE support to be enabled.

The destination memory operand MUST be aligned on a 4-byte boundary; failure to do so may result in an alignment check exception if alignment checking is enabled. Ensure the destination is a dword to avoid memory corruption or exceptions.