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SQRTSD

Computes the square root of a scalar double-precision floating-point value.

The following table describes the supported sources and destinations.

DO NOT support LOCK

This instruction is available in both 64-bit mode and compatibility mode. It requires the SSE3 extension to be supported by the processor.

If the source operand is a signaling NaN, #I is generated. If the source operand is negative, #I is generated and a qNaN is returned. If the source operand is negative zero, the result is negative zero and no exception is generated.

The instruction behavior is governed by the rounding mode specified in the MXCSR register. If the result cannot be represented exactly in the destination f64 format, #P is generated.