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PTWRITE
Writes a 64-bit value to a page-table entry specified by a linear address, ensuring the write is performed as an atomic operation if the memory is aligned.
The table below covers what the source and destinations can be.
| source | destination(s) |
|---|---|
| reg | m8 |
| imm | m8 |
DO NOT support LOCK
The instruction SHALL only be executed in 64-bit mode. Execution in compatibility mode or 32-bit mode SHALL result in an invalid opcode exception.
To avoid unexpected behavior and potential memory corruption, the destination address MUST be aligned on a qword boundary. If the address is not aligned, the atomicity of the update to the page-table entry is NOT guaranteed, which MAY lead to inconsistent paging structures in multiprocessor environments.