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PTEST
Performs a bitwise logical AND between two operands and sets the ZF (Zero Flag) based on the result. If the result of the AND operation is zero, ZF is set to 1; otherwise, ZF is cleared to 0.
The table after the description covers what the source and destinations can be.
| source | destination(s) |
|---|---|
| reg | reg |
| mN | reg |
| reg | mN |
DO NOT support LOCK
PTEST is only available in 64-bit mode. It is NOT supported in compatibility mode or 32-bit mode.
The instruction does not modify the destination operands; it only affects the ZF flag. This avoids the destructive nature of the standard TEST instruction when dealing with specific register constraints. Users SHALL ensure the processor is operating in 64-bit mode to avoid illegal instruction exceptions.