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PSRLD
Shifts the contents of the specified source operand to the right logically by the count specified in the ECX register. The vacancies in the most significant bits are filled with zeros.
The following table covers the supported source and destination operands.
| source | destination(s) |
|---|---|
| reg | reg |
| mN | reg |
| #I | #I |
DO NOT support LOCK
This instruction is available only in 32-bit mode and compatibility mode. It shall not be used in 64-bit mode.
The shift count is determined by the low-order 5 bits of ECX; therefore, only values from 0 to 31 are effectively used. If the source operand is a 16-bit register, the shift count is masked to 5 bits, but the shift is performed on a 16-bit value. Ensure the ECX register is properly initialized before execution to avoid unexpected shift counts.