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PSRAQ

Shifts the elements of a 128-bit XMM register to the right by the count specified in a register, filling the vacated bits with zeros.

The following table covers what the source and destinations can be.

DO NOT support LOCK

This instruction is only available in 64-bit mode. It cannot be used in compatibility mode.

The shift count is specified in the low-order 5 bits of the source register; if the register contains a value greater than or equal to 32, the shift count is masked to avoid undefined behavior. The operation is performed on each 64-bit quadword element of the XMM register independently. Failure to ensure the shift count register is correctly initialized may lead to unexpected results.