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PSLLDQ
Shifts a 64-bit quad word to the left by a specified immediate number of bits. Bits shifted out of the most significant position are discarded, and zeros are shifted into the least significant positions.
The following table covers what the source and destinations can be:
| source | destination(s) |
|---|---|
| imm | r64 |
| imm | m8 |
DO NOT support LOCK
This instruction is available in 64-bit mode. It is NOT supported in compatibility mode.
The immediate operand SHALL be a constant value between 0 and 63. If the immediate value is outside this range, the instruction is invalid. Unlike the general-purpose shift instructions (SHL), PSLLDQ does not use the CL register; it requires an immediate value. The destination register or memory location MUST be 64 bits wide.