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PSLLD

Shifts the signed quadword value in the source operand to the left by the count specified in the second operand. Vacant bits are filled with zeros.

The following table covers what the source and destinations can be:

DO NOT support LOCK

This instruction is available only in 64-bit mode. It is NOT supported in compatibility mode.

The shift count is determined by the low-order 5 bits of the source register/immediate, meaning the effective shift is modulo 32. If the shift count is 32 or greater, the behavior is determined by the mask applied to the count, not the literal value. Failure to account for the 5-bit mask may result in unexpected shift distances.