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PSIGNB

Sign-extends a byte operand from a source to a destination, filling the destination with the sign bit of the source byte.

The following table covers the supported source and destination operands:

DO NOT support LOCK

This instruction is only available when the processor is operating in 64-bit mode or compatibility mode as part of the SSE4.1 instruction set. It requires the destination register to be an XMM register.

The destination register is overwritten; therefore, the original value of the destination register must be preserved in another register if it is required for subsequent operations. Failure to ensure the destination is an XMM register will result in an invalid opcode exception.