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PREFETCHWT1

Fetches data from the specified memory address into the cache and indicates that the data is likely to be written to, prompting the cache to fetch the data into the cache while minimizing cache pollution by using a lower priority (T1) replacement policy.

The table below covers what the source and destinations can be.

DO NOT support LOCK

The instruction is a hint to the processor; therefore, it SHALL NOT be used to guarantee that data is present in the cache. It is supported in 64-bit mode and compatibility mode.

The instruction DOES NOT trigger a page fault if the memory address is invalid or not present; it is ignored if the address is not canonical or if there is a memory access violation. Because it is a hint, the processor MAY ignore the request entirely based on current system load or cache state.