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PMULLW

Multiplies the unsigned 16-bit integers in each lane of the first source operand by the corresponding unsigned 16-bit integers in the second source operand. The lower 16 bits of the result for each lane are stored in the destination operand.

The following table covers what the source and destinations can be:

DO NOT support LOCK

This instruction is only available when the processor supports the SSE4.1 instruction set. It operates on XMM registers and is not available in 16-bit operation mode.

The instruction performs an unsigned multiplication; if signed multiplication is required, PMULHW or PMULLW cannot be used interchangeably as they treat the input bit patterns as unsigned. Because only the lower 16 bits of the product are retained, overflow occurs silently for any product exceeding $2^{16}-1$, and the upper 16 bits of the result are discarded.