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PADDUSW

Adds unsigned word values from two XMM registers, saturating the result to the unsigned word maximum (65535) if an overflow occurs.

The following table covers the supported source and destination operands.

DO NOT support LOCK

This instruction is available in 64-bit mode and 32-bit mode. It requires the SSE4.1 instruction set extension.

The operation is performed on packed 16-bit unsigned integers. If the addition of two u16 values exceeds 65535, the result is set to 65535. Failure to ensure that the input data is treated as unsigned u16 will result in incorrect saturation behavior, as the instruction does not perform sign extension.