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MOVNTPS

Moves packed single-precision floating-point values from an XMM register to memory without using the cache, utilizing a non-temporal hint to minimize cache pollution.

The following table covers the supported source and destination operands.

DO NOT support LOCK

The destination memory address MUST be aligned on a 16-byte boundary; otherwise, a general-protection exception (#GP) is generated. This instruction is available in 64-bit mode and 32-bit mode.

The instruction performs a non-temporal store, which bypasses the cache hierarchy. This behavior means that the store is not coherent with other cached copies of the data until the store is flushed from the write-combining buffers. To ensure that the data is visible to other processors or devices, a SFENCE instruction SHOULD be executed. Failure to use a memory fence may result in memory ordering violations.