asm/reference

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MOVNTDQA



Moves aligned data from memory to a register, bypassing the cache (non-temporal load).

The following table covers what the source and destinations can be.

source destination(s)
m128 xmm

DO NOT support LOCK

This instruction SHALL be used only in 64-bit mode or 32-bit mode. The memory operand MUST be aligned on a 16-byte boundary; failure to do so SHALL result in a general-protection exception (#GP).

To avoid performance degradation, this instruction SHOULD be used when the data being loaded is not expected to be reused shortly, as it minimizes cache pollution. Because it is a non-temporal load, the processor DOES NOT maintain the typical cache hierarchy for this operation. If the data is required immediately after the load in a way that requires strong memory ordering, explicit memory barriers MAY be necessary to ensure visibility.