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MONITOR

Sets the address range to be monitored for write accesses. When a write occurs to the monitored address, the processor clears the wait state, allowing a subsequent MWAIT instruction to terminate its sleep state.

The table after the description covers what the source and destinations can be.

DO NOT support LOCK

The MONITOR instruction is only available in 64-bit mode. It is NOT supported in compatibility mode. The address monitored is aligned to a cache line boundary; any address within the same cache line as the operand will trigger the wake-up event.

The address operand MUST be a valid memory address. If the address is not aligned to a cache line boundary, the processor monitors the cache line containing the address. A MWAIT instruction MUST follow a MONITOR instruction to effectively enter a low-power state; executing MWAIT without a preceding MONITOR instruction results in undefined behavior or fails to enter the intended state. The monitor state is cleared if an interrupt occurs or if a write access to the monitored range is detected.