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MINSD

Subtracts the minimum of two scalar double-precision floating-point values and stores the result in the destination operand.

The following table covers what the source and destinations can be:

DO NOT support LOCK

This instruction is available in 64-bit mode and compatibility mode. It requires SSE3 support.

The operation is performed based on the floating-point rounding control in the MXCSR register. If the result cannot be represented exactly, the #P exception may be raised. The instruction handles special values (NaN, infinity) according to IEEE 754 standards. Only the lowest 64 bits of the destination xmm register are updated; the upper 64 bits remain unchanged.