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MFENCE

The MFENCE instruction serializes memory operations. It ensures that every load and store operation that precedes the MFENCE instruction in program order is globally visible before any load or store operation that follows the MFENCE instruction in program order.

The following table covers what the source and destinations can be.

DO NOT support LOCK

MFENCE is supported in 32-bit and 64-bit mode. It is not available in 16-bit real address mode.

To avoid memory consistency errors in multi-processor environments, MFENCE SHALL be used when a program MUST guarantee that previous writes are visible to other processors before subsequent reads or writes are executed. Note that MFENCE is more restrictive than SFENCE (which only orders stores) or LFENCE (which only orders loads). Use of MFENCE may impact performance due to the complete pipeline stall required to ensure global visibility of all pending memory operations.