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LSS

Loads a segment selector and its descriptor's limit into a segment register and the TFSR (Task Register) or a specified memory location, typically used to load the Local Descriptor Table (LDT) selector into the LDTR.

The following table covers what the source and destinations can be.

DO NOT support LOCK

The LSS instruction is NOT supported in 64-bit mode. It is only available when the processor is operating in compatibility mode or in legacy protected mode.

The instruction requires the source memory operand to be aligned. Accessing an unaligned memory location may result in a general-protection exception (#GP) depending on the alignment check (AC) flag in the EFLAGS register. Attempting to load an invalid selector or a selector that does not point to a valid LDT descriptor SHALL trigger a general-protection exception (#GP).