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LGS

Loads the Global Descriptor Table (GDT) register (GDTR) from a memory location.

The table after the description covers what the source and destinations can be.

DO NOT support LOCK

LGS SHALL only be executed at CPL=0. If executed at CPL > 0, it SHALL generate a general-protection exception (#GP(0)). In 64-bit mode, the instruction loads a 8-byte value from memory into the GDTR, consisting of a 16-bit limit and a 64-bit base address. In compatibility mode, it loads a 6-byte value.

The source memory operand MUST be a byte pointer to the descriptor; the processor will automatically read the subsequent bytes required for the GDT register based on the current operating mode. Ensure that the memory region is aligned and accessible to avoid page faults or alignment checks.