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GF2P8AFFINEINVQB

This instruction computes the inverse affine transformation for each byte in a 128-bit quadword over the finite field $\text{GF}(2^8)$. It transforms the input bytes using a specified affine transformation inverse based on the constants defined by the AES standard.

The following table specifies the supported source and destination operands.

DO NOT support LOCK

This instruction is only available when the processor supports the GALILEO feature set. It operates exclusively on XMM registers; memory operands are not supported.

To avoid undefined behavior, ensure that the destination register is not used as a source for other dependent operations within the same pipeline stage to prevent hazards, although the hardware handles data dependencies. The operation is performed on a per-byte basis across the 128-bit register, meaning the transformation of one byte does not affect others.