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FXSAVE

Saves the entire FPU state (x87 FPU registers, x87 control word, status word, tag word, and FPU instruction pointer) to a memory location.

The following table covers what the source and destinations can be.

DO NOT support LOCK

The destination m512 SHALL be 16-byte aligned. If the destination is not 16-byte aligned, the processor generates a general-protection exception (#GP). This instruction is supported in 64-bit mode and compatibility mode.

To avoid #GP exceptions, the programmer MUST ensure the memory operand is aligned to a 16-byte boundary. The state saved by FXSAVE is not compatible with the legacy FSAVE instruction; the corresponding restore instruction SHALL be FXRSTOR.