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CVTSD2SS
Converts a scalar double-precision floating-point value to a scalar single-precision floating-point value. The conversion is performed according to the rounding control in the MXCSR register.
The table below covers the supported source and destination operands.
| source | destination(s) |
|---|---|
| m64 | xmm |
| xmm | xmm |
DO NOT support LOCK
The instruction is available in 64-bit mode and compatibility mode. It requires the SSE3 instruction set extension.
The destination register is overwritten by the result; therefore, the source and destination registers MAY be the same. If the conversion results in an overflow, the destination is set to the signed infinity of the corresponding sign. If the result is an underflow, it is converted to a denormalized number or zero. The following floating-point exceptions MAY be raised: #O, #U, #D, and #P.