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CVTPS2PD

Converts the lowest two single-precision floating-point values from a packed source to two double-precision floating-point values in a destination.

The following table covers what the source and destinations can be:

DO NOT support LOCK

This instruction is available in 64-bit mode and 32-bit mode. It requires the SSE3 instruction set extension.

The instruction only operates on the lowest 64 bits of the destination xmm register; the upper bits of the destination register are undefined. Precision and rounding are controlled by the MXCSR register. If the conversion results in a value that cannot be represented in the destination format, it SHALL trigger #O. If the result is inexact, it SHALL trigger #P.