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CMPSS

Compares two scalar single-precision floating-point values according to the specified predicate and sets the condition flags (CF, ZF, PF) in the EFLAGS register based on the result.

The following table covers what the source and destinations can be:

DO NOT support LOCK

This instruction requires the SSE extension. It is available in both 32-bit and 64-bit mode.

The comparison result depends on the predicate specified in the immediate operand. If either operand is a Signaling NaN, a #I exception is generated. If the predicate is "unordered" and either operand is a NaN, the ZF flag is cleared and CF is set. Users MUST ensure the destination register is an xmm register to avoid invalid operand exceptions.