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CLTS

Clears the TS (Task Switched) flag in CR0.

The table after the description covers what the source and destinations can be.

DO NOT support LOCK

This instruction is available only in 64-bit mode and compatibility mode. It is a privileged instruction and SHALL only be executed at CPL=0; otherwise, it triggers a general protection exception (#GP).

The CLTS instruction is specifically used to clear the TS bit to allow the processor to execute instructions that require a valid state, such as those involving the FPU or SSE, without triggering a device-not-available (#NM) exception. Failure to clear this bit after a task switch in certain environments MAY result in unexpected #NM exceptions when accessing floating-point units.