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BNDSTX

Stores the lower 32 bits of the bound register in the destination operand and the upper 32 bits of the bound register in the subsequent memory location.

The table after the description covers what the source and destinations can be.

DO NOT support LOCK

This instruction is only available in 64-bit mode. It is NOT supported in compatibility mode.

The destination operand MUST be a memory location. Since the instruction writes 8 bytes total (two dwords), it SHALL ensure that the destination memory address is aligned to avoid potential performance penalties or faults depending on the alignment check settings. This instruction specifically interacts with the MPX (Memory Protection Extensions) bound registers; if MPX is not supported by the processor or disabled in the BIOS/OS, this instruction SHALL trigger an invalid opcode exception.