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AESENCLAST

Performs the final round of an AES encryption. It executes the ShiftRows, SubBytes, and AddRoundKey operations on the data in the destination operand using the round key provided in the source operand.

The following table specifies the supported source and destination operands.

DO NOT support LOCK

This instruction is available only in 64-bit mode or compatibility mode. It requires the processor to support the AES-NI instruction set extension.

The destination register MUST NOT be the same as the source memory operand to avoid undefined behavior in certain microarchitectures, although the architecture supports register-to-register dependency. Since this is the final round, it SHALL NOT perform the MixColumns operation; using AESENCLAST in a round that requires MixColumns will result in incorrect ciphertext.