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AESDEC128KL

Performs one round of the AES-128 decryption common cipher operation on a 128-bit state. The instruction applies the Inverse ShiftRows, InvMixColumns, and AddRoundKey transformations.

The following table covers what the source and destinations can be:

DO NOT support LOCK

This instruction is available only when the processor supports the AES-NI instruction set. It requires the processor to be operating in 64-bit mode or compatibility mode.

The destination register is overwritten by the result of the AES decryption round; therefore, the original state SHALL be preserved in a separate register if needed for subsequent operations. Use of this instruction without the corresponding AES-NI CPUID flag being set SHALL result in an invalid opcode exception.